1. Field of the Invention
This invention relates to improvements in methods and apparatuses for use in conjunction with polyphase dc motors of the type used in spinning hard disk drives, or the like, and more particularly to improvements and methods for use in braking such motors.
2. Relevant Background
In the operation of hard disk drives, for example, in computer applications, certain protocols are often employed to control the braking of the motor which spins the disk drive. In usual operation, a hard disk drive has one or more heads, which record and detect magnetic fields onto a recording media on the rotating disks of the disk drive. The heads are positionable to precise radial locations by a xe2x80x9cvoice coil motorxe2x80x9d, which controls the movement of arms on which the heads are carried. When the disk is at rest, the heads normally ride just resting on the disk; however, when the disk is spinning, air forces generated between the disk and the heads cause the heads to float a small distance above the magnetic media.
Thus, when the disk drive is stopped, the air force also stops, allowing the heads to fall into contact with the magnetic media. If the heads come into contact with the media while there is still some movement of the media, wear or damage may result, both to the recorded area on the media and to the heads. Consequently, means have been proposed to position the heads over a xe2x80x9clanding stripxe2x80x9d portion of the disk, so that only that strip is damaged by a head falling onto the disk. Nevertheless, it will be appreciated that repeated contact between the disk and head will eventually wear upon the head, as well. Some manufactures, in fact, recommend that a computer not be powered down to avoid the type of damage that such contact causes.
Once the heads are in place and the disk drive is powered down, it is sometimes possible for the head mechanism, which is now in contact with the disk media, to move if the computer is moved, for example, as would be anticipated in portable or laptop type computers. Consequently, some manufacturers also provide for a locking mechanism, usually mechanical in construction, to hold the heads in a landed position over the landing strip. Some types of such locking mechanisms require an extra bit of electrical energy, just as the head reaches the landing position to overcome the mechanical restraint to bring the heads into their locked position.
In the event of a loss of power, to prevent the heads from landing on portions of the magnetic media other than the designated landing pad, often when a power failure is detected, the motor spinning the motor is allowed to continue spin under the inertia of the various masses of the drive. As a result, the motor coils generate their own counter- or back-emf. The coils of the spinning motor are then connected to deliver the voltages generated by the counter-emf produced in the motor windings to operate the circuitry and to provide the energy to the voice coils necessary to drive the heads to the landing strip.
Once the heads are positioned over the landing strip, the motor is then braked to stop its rotation as rapidly as possible, so that the time in which the head may contact the disk is minimized. Such braking, of course, requires additional energy. It can therefore be seen that design considerations need to be implemented to insure that a sufficient amount of energy is generated to move the heads completely to the landing strip, including the locking position, if necessary, to avoid a premature landing on an unwanted portion of the disk media. During this landing period, sufficient rotational speed of the motor must be provided to ensure a sufficient air flow to maintain the vertical position of the heads over the disk media.
However, once the heads are properly positioned, the motor must be rapidly stopped during an optimal rotational speed of the disk. This is ordinarily done by grounding sets of the driver transistors (or connecting them to a particular potential, such as Vcc). This causes the magnetic fields generated in the motor windings by the free-spinning rotor to resist its rotation, which rapidly brings the disk to a stop. However, if the disk is stopped too soon, the heads may not reach their landing strip position, which may result in undue skidding of the heads on the surface of the disk. On the other hand, if the driver transistors are shorted while the motor is still spinning too rapidly, excessive currents can be generated in the driver transistors, which may burn them out.
In the past, the motor speed was only estimated, using an RC circuit in which the capacitor of the circuit began its discharge upon loss of power, and which activated a braking circuit when the charge on the capacitor reached a predetermined discharged value. It can be appreciated, however, that such RC circuit was insensitive to the actual speed of the disk, the inertial momentum of the disk parts, the speed variations caused by aging of the disk drive parts, including aging of the RC parts themselves, and other such factors. Such RC circuits, therefore, needed to be custom designed for each different disk drive with which they were associated, and even then, the RC circuits only estimated when the disk velocities were was reduced to that at which braking should occur.
What is needed, therefore, is a method and apparatus for braking a polyphase dc motor used to spin a disk of a hard disk drive, or the like, controllably at a time when its rotational speed is within an actual and determinable range.
In light of the above, therefore it is an object of the invention to provide a method and apparatus for braking a polyphase dc motor used to spin a disk of a hard disk drive, or the like, controllably at a time when its rotational speed is within an actual and determinable range.
This and other objects, features and advantages of the invention will be apparent to those skilled in the art from the following detailed description of the invention, when read in conjunction with the accompanying drawings and appended claims.
According to a broad aspect of this invention, a circuit is provided for braking a polyphase dc motor. The circuit includes a circuit for producing an output signal indicating that the motor has slowed at least to an actual rotational speed and a braking circuit to brake the motor when the output signal indicates that the motor has slowed at least to an actual rotational speed. The circuit for producing an output signal indicating that the motor has slowed at least to an actual rotational speed and the braking circuit may be powered by a back-emf generated by the motor when power is disconnected from the motor.
The circuit for producing an output signal indicating hat the motor has slowed at least to an actual rotational speed may include a circuit for comparing a frequency of a speed signal with a clock pulse frequency. This comparing circuit may include a first counter for counting pulses of the speed signal. The first counter produces a first output when the first counter reaches a first predetermined pulse count. A second counter counts the clock pulses. The second counter produces a second output when the second counter reaches a second predetermined pulse count. The first output is connected to restart the first and second counter, and the second output provides an indication when the frequency of the speed signal is lower than a desired ratio to the clock pulse frequency.
The braking circuit may include circuitry, such as latches, or the like, to cause driver transistors for the motor to connect coils of the motor to a predetermined constant potential, such as ground or Vcc, when the output signal provides an indication that the frequency of the speed signal is lower than the clock pulse frequency.
According to another broad aspect of the invention, a circuit is provided for braking a polyphase dc motor which includes a circuit for comparing a frequency of a speed signal with a clock pulse frequency and for producing an output signal to provide an indication when the frequency of the speed signal is lower than a desired ratio to the clock pulse frequency. A braking circuit brakes the motor when the output signal provides an indication that the frequency of the speed signal is lower than a desired ratio to the clock pulse frequency. The circuit for producing an output signal indicating that the motor has slowed at least to an actual rotational speed and the braking circuit may be powered by a back-emf generated by the motor, when power is disconnected from the motor.
The circuit for comparing a frequency of a speed signal with a clock pulse frequency may include a first counter for counting pulses of the speed signal. The first counter produces a first output when the first counter reaches a first predetermined pulse count. A second counter counts the clock pulses and produces a second output when the second counter reaches a second predetermined pulse count. The first output is connected to restart the first and second counters, and the second output provides an indication when the frequency of the speed signal is lower than the clock pulse frequency.
The braking circuit may include circuitry to cause driver transistors for the motor to connect coils of the motor to a predetermined constant potential, such as ground or Vcc, when the output signal provides an indication that the frequency of the speed signal is lower than a desired ratio to the clock pulse frequency. The driver transistors may be, for example, FET devices, and the circuitry to cause driver transistors for the motor to connect coils of the motor to a predetermined constant potential may be latches to apply a voltage to gates of the FET devices when the output signal provides an indication that the frequency of the speed signal is lower than a desired ratio to the clock pulse frequency.
According to yet another broad aspect of the invention, a method for braking a polyphase dc motor is presented. The method includes generating a speed signal indicating a spinning velocity of the motor. Upon of power that energizes the motor, the method also includes determining from the speed signal that the motor has slowed at least to an actual predetermined spinning velocity and activating a braking circuit when the motor speed has been determined to have reached the predetermined spinning velocity. The step of determining from the speed signal that the motor speed has slowed at least to an actual predetermined spinning velocity may be performed by counting pulses of the speed indicating signal, counting pulses of the clock pulses, comparing the counted speed signal pulses and the counted clock pulses, and generating a brake signal to activate the braking circuit when the predetermined limit of counted clock pulses exceed the predetermined limit of counted speed signal pulses. In comparing the number of speed indicating pulses and the number of clock pulses, the steps of counting pulses of the speed indicating signal and the clock pulses may be restarted if a number of the speed indicating pulses reaches a first predetermined number before a number of the clock pulses reaches a second predetermined number.